How to fix the A1200 motherboard timing bugs
This popular and often revised page details the timing/signal integrity fixes required to the Commodore (and Escom) A1200 motherboards to fix issues with some 3rd part accelerators. The author has successfully applied the fixes which ensured that his Apollo 1240 accelerator worked with a Rev 2B motherboard.
There is anecdotal evidence that as well as the motherboard revision, the revisions of the Alice and Gayle chips can affect other motherboards. The author only has a single A1200 motherboard on which measurements have been undertaken.
Updated 29th September 2013
Undertook some measurements of the timing fixes and the signals, discovered that the fixes are actually for signal integrity. A copy of the results are provided on this webpage.
Revised again 15th July 2013
Re-ordered page and made it clearer what fixes are for the Apollo board and what ones are for the Individual Computers ACA cards.
Revised 5th April 2013
Added additional information and suggested parts for the ACA1230/1232 timing fixes.
See this thread for the new suggested fixes for the ACA1230:
Update: These fixes may also be required on other A1200 motherboards when using the Individual Computers
ACA 1230 accelerator cards. See the discussions here for more details at EAB forums:
Details of the timing fixes
The primary purpose of the fixes, based on the author's measurements was to clean up the 7/14 MHz clock signals used on the motherboard.
Some rev 2B motherboards appear to have some additional wire links. As far as I can tell these wire links are to correct for PCB tracking problems as they follow existing tracking.
There are different fixes for the old Apollo accelerator cards and the newer Individual Computers ACA123x cards, please ensure you follow the correct set of instructions.
The original timing fixes (REV 1D4 and 2B) for Apollo cards only
Recommended changes for ACA1230/1232 accelerators
(source http://eab.abime.net/showthread.php?t=60387 )
Changing E121R and E122R, requires a 1206 size ferrite bead. They are typically specified with an impedance at a set frequency, normally 100 MHz. The original post specifies 60 ohms, assuming @ 100 MHz.
Suitable parts from Farnell are:
MURATA - BLM21AG121SN1D (stock code 1515617)
Wurth Elektronik 7427922 (stock code 1635740)
Taiyo Yuden FBMJ3216HM600-T (stock code 1651732)
MEC Marcom MLB-321611-0060PQ (stock code 1308785)
The two 22pF capacitors are again 1206 size ceramic capacitors. They will most likely by NPO/COG dielectric.
Locating E123R/E123C and E125R/E125C (Apollo cards only)
Double click image to see larger version
These components to remove are on the underside of the PCB.
The two components you need to remove are highlighted
Note: It does not matter if you remove either the resistor or the capacitor, removal of either part will fix the timing issue.
(Click image for a larger view 839K JPEG)
Locating E121R and E122R
Ignore the blue marks on the other pads, they were marked by the author to identify ground point for the oscilloscope probes.
The picture above shows Murata ferrite beads fitted in place of 27R resistors.
Locating R118 (Rev 2B only)
This is near the CPU expansion of the A1200.
Remove the existing resistor and add a 220R resistor as shown.
Clockport to Paula wire link (REV 2B only)
This wire mod connects A30 of the address bus (clockport P9A pin 6) to pin 46 of Paula (A30)!
(Click image for larger view 159KB JPEG)
U8 8520 CIA Wire link (REV 2B Only)
Another wire link to connect something that the PCB should!
This connects Pin 44 (C) to Pin 2 (PA0) which then connects to POUT of the parallel port.
(Click image for larger view 108KB JPEG)
Resistor added by ROMs (REV 2B Only)
This is actually part of the timing mods detailed above.
The connection to C6B (brown SMT capacitor) is to pick up +5V. The resistor that has been added is a 470 Ohm, 0.25W resistor that then connects to DRA0 (DRAM address bus bit 0) by a PCB via. The timing modifications below state you should connect a 470 Ohm resistor from +5V to pin 43 of Alice, this modification does the same thing.
(Click image for larger view, 145KB JPEG)
Technical details of the timing fixes (updates in progress)
To determine what exactly the fixes do, the author's A1200 was stripped down to a bare bones system and an oscilloscope was used for signal measurements. The Author has an Agilent DSO3202 200 MHz oscilloscope with Agilent N2863 300 MHz probes used for the measurements shown below.
Based on the measurements undertaken to date, the fixes primarily fix signal integrity issues, which by their nature, will improve the signal timing fo the clock signals on the A1200. The author, mistakenly assumed the fixes were to delay signals, until he measured them.
The A1200 schematics are advisable for reference to help understand the measurements shown below.
Budgie (U20) pin 95 (28 MHz clock) without modifications
Notice the 1V of undershoot on the signal?
Measuring the signal at U4 (Lisa) the signal is much cleaner as shown here:
The 28 MHz clock was measured as it was thought that it was worth measuring the timing of the derived 14 MHz and 7 MHz clocks in relation to this. It was not needed but the results shown here for completeness. The signal shown at the destination is clean, no changes to E133 are required.
The next group of measurements centred around E121R and E122R as this was a new fix, the reasons soon became clear.
CPUCLK (14 Mhz) at E121R before component changes
As this has been measured at the driving end of a series terminator, we are not as concerned about the signal quality than at the receiving end of the transmission line. That said, the non-monotonic 'blip' in the centre of the waveform points to issues with this signal.
Note: what is not shown in this trace is that the falling edge of the clock signal changed position by 3 ns on alternate trigger cycles. This is not ideal. Applying the ferrite bead change below did not fix this.
Applying the recommended fix of changing E121R and E122R to ferrite beads, cleaned the signal up considerably as shown here:
E121 replaced with ferrite bead.
This was measured at the same place as the signal above (though the scaling has been chnaged). Notice how much cleaner the signal looks.This goes to the MC68EC020 and will also be connected to the A1200 edge connector as it is used by the accelerator card, as the reference clock to time accesses to the Amiga main board. If this signal is excessively noisy it will affect the timign between the 14 MHz master clock and the accelerator card, hence the need for a fix.
With the ferrite beads in place, the 14 MHz clock signal at the onboard MC68EC020 was measured
14 MHz clock at MC68EC020 pin 5 with E121/E122 replaced with ferrite beads
This signal is clean and should not cause any issues.
The timing between the 7 MHz and 14 MHz clocks was measured to see if they were phase aligned, they appeared to be and are shown here:
Timing relationship between the 14 MHz and 7 MHz system clocks
The top trace is the 14 MHz clock, the lower is the 7 MHz clock.
Finally, a measurement of one of the 7 MHz clock fixed by removing E125C
This signal looks good.
It is planned to restore E123C/E125C to see how they affect the signal. Also it is planned to trial a fix to clean up the 14 MHz CPU clock as it showed excessive jitter.
Need more help or advice on soldering?
Try these web guides:
Document originally written by Ian Stedman, 26th November 2003.
Updated 09 August 2018